![]() | Mahmoudi, S., Da Cunha Possa, P., Ravet, T., Drugman, T., Chessini Bose, R., Dutoit, T., & Valderrama, C. (01 October 2015). Sensor-based Framework for Automatic Cough Detection and Classification. Advances in Intelligent Systems and Computing, 7 (2015). |
![]() | Da Cunha Possa, P., Harb, N., & Valderrama, C. (22 June 2015). P²IP: A novel low-latency Programmable Pipeline Image Processor. Microprocessors and Microsystems, 39 (2015), 529-540. doi:10.1016/j.micpro.2015.06.010 ![]() |
Da Cunha Possa, P. (2013). Reconfigurable low-latency architecture for real-time image and video processing. Unpublished doctoral thesis, Université de Mons. Jury: Valderrama, C. (Promotor), Manneback, P., Dutoit, T., Saghir, M., Harb, N., ... Dokládalová, E. |
Fortounis, G., Chessini Bose, R., Harb, N., Jojczyk, L., Da Cunha Possa, P., & Valderrama, C. (2013). Multi-Core Embedded Systems. In Encyclopedia of Embedded Computing Systems (pp. 350). IGI Global. doi:10.4018/978-1-4666-3922-5 |
Da Cunha Possa, P. (19 March 2013). A reconfigurable low-latency architecture for real-time image and video processing. Paper presented at Design, Automation & Test in Europe (DATE), Grenoble, France. |
Da Cunha Possa, P., & Valderrama, C. (12 March 2013). A New Architecture for Feature Detection: The P²IP. Poster session presented at 7ième Matinée des Chercheurs, Mons, Belgium. |
![]() | Da Cunha Possa, P., Mahmoudi, S., Harb, N., & Valderrama, C. (29 August 2012). A New Self-Adapting Architecture for Feature Detection. Lecture Notes in Computer Science, 978-1-4673-2257-7 (2012(22) Oslo), 643 - 646. doi:10.1109/FPL.2012.6339230 |
![]() | Ibala, C., Vachaudez, J., Fourtounis, G., Da Cunha Possa, P., & Valderrama, C. (2012). Combining Sound Source Tracking Algorithms Based on Microphone Array to Improve Real-Time Localization. Paper presented at International Conference on Mixed Design of Integrated Circuits and Systems MIXDES, Warsaw, Poland. |
Da Cunha Possa, P., & Valderrama, C. (01 March 2012). Flexible Architecture for Real-Time Image and Video Processing. Poster session presented at Matinée des chercheurs (MDC 2012) - Research Fair 2012, Bruxelles, Belgium. |
Da Cunha Possa, P., Schaillie, D., & Valderrama, C. (2011). FPGA-based Hardware Acceleration: A CPU/Accelerator Interface Exploration. Paper presented at 18th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2011, Beirut, Lebanon. |
Valderrama, C., Jojczyk, L., Da Cunha Possa, P., & Dondo Gazzano, J. (2011). FPGA and ASIC convergence. Paper presented at VII Southern Programmable Logic Conference - SPL2011, Córdoba, Argentina. |
Da Cunha Possa, P., El Hadhri, Z., Jojczyk, L., & Valderrama, C. (2011). Flexible platform for real-time video and image processing. Paper presented at VII Southern Programable Logic Conference - SPL2011, Córdoba, Argentina. |
Da Cunha Possa, P. (22 March 2011). Software Acceleration Using a Hardware Exploration Environment. Poster session presented at Matinée des Chercheurs 2011, Université de Mons, Belgium. |
Jojczyk, L., Da Cunha Possa, P., & Valderrama, C. (2010). Design of a low latency spectrum analyser using the Goertzel algorithm with a network on chip. Paper presented at 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece. |
Valderrama, C., Jojczyk, L., & Da Cunha Possa, P. (2010). Convergence in Reconfigurable Embedded Systems. Paper presented at 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, Athens, Greece. |
Da Cunha Possa, P., El Hadhri, Z., & Valderrama, C. (2010). Image and video processing on FPGAs: An Exploration Framework for Real-Time Applications. Paper presented at IFAC Workshop on Programmable Devices and Embedded Systems PDeS 2010, Pszczyna, Poland. |
Valderrama, C., Jojczyk, L., & Da Cunha Possa, P. (2010). Trends in Reconfigurable Embedded Systems. In Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility Editors M. Khalgui, H-M. Hanisch (pp. 566). IGI Global. |
Da Cunha Possa, P. (17 February 2010). Proposal of a reconfigurable parallel architecture for real time image and video processing. Poster session presented at Matinée des Chercheurs 2010, Brussels, Belgium. |
Da Cunha Possa, P., Chessini Bose, R., & Luchesi Paim, R. (17 March 2009). New HW technologies tendency to multiple signal processing. Poster session presented at Matinée des chercheurs (MDC'2009), Mons, Belgium. |